Abstract submitted by: Group #2

Michael Wood, Hock Lee Ooi, Fadi Yared

Design, Verification and Implementation of a Floating Point Coprocessor.

A floating point unit (FPU) was designed using MAX++ II 10.2 software and implemented on the Altera UP1 Education Board with a chip from the FLEX10K family. The FPU was designed to interface via an eight bit parallel communications handshaking protocol with a microcontroller from the MC68HC11 family, hosted on an evaluation board offered by Technological Arts. This arrangement was used to demonstrate and verify the design.

The FPU has been designed to carry out addition, subtraction, multiplication and division according to the IEEE-754 floating point standard. In all areas of the design, effort has been taken to follow the IEEE standard as strictly as possible. The addition, subtraction and multiplication designs were implemented following standard sequential circuit algorithms. Division was implemented according to the non-restoring division algorithm, using 24 bit registers for the mantissas. This represents a loss of precision for similar numbers; therefore, an alternate design using 48 bit mantissas was included.

The communications protocol was designed according to a handshaking scheme defined by the documentation for MC68HC11 family microcontrollers. Two designs were created: the first using two dedicated ports for send and receive, the second using a single bidirectional port for data transmission.

Two user interfaces were designed in software for the MC68HC11. The first was meant for debugging and demonstration purposes. The MC68HC11 connects to a terminal window via the serial port of a PC, and accepts commands of the form 8E45F985+85A38C5E, where each character is a hex value representing four bits of the 32 bit operand encoded according to the IEEE-754 floating point standard. It then returns the result to the terminal window in the same format. The second interface is for programmer use. It offers function calls fadd, fsub, fmult, fdiv which require that the data spaces FOP1 and FOP2 contain the operands. It records the result in data space FRES.

This project is of main importance as an educational tool. All designs were implemented on platforms used in Queen’s ECE curriculum; therefore, Queen’s ECE students have free access to the same environments. Future development may add new functions to the FPU such as integration or convolution. The design files could be displayed as concrete implementations of some abstract concepts presented in classes such as ELEC 374. And finally, members of the Queen’s community such as the Solar Car Team may use this design in some of their applications.